1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method thereof, and in particular relates to a deep trench contact structure and a deep trench insulating structure and a fabrication method thereof.
2. Description of the Related Art
For present semiconductor techniques, an operational single-chip system has been achieved by highly integrating controllers, memory devices, low-operation-voltage circuits, and high-operation-voltage power devices, into a chip. Research development techniques of the power devices, such as vertical double diffused metal oxide semiconductor (VDMOS), insulated gate bipolar transistor (IGBT), lateral double diffused metal oxide semiconductor (LDMOS), or other techniques, have focused on increasing efficiency to decrease energy loss of the devices. Meanwhile, isolation structures are formed for isolating adjacent devices since high voltage transistors and the low voltage CMOS circuits are integrated into a chip.
FIG. 1 is a cross-section view illustrating a semiconductor device as known in the art. A deep trench insulator 20, formed of dielectric material, is usually used for isolating adjacent devices. Thus, power parameters of the isolated devices can be controlled, respectively. However, spurious capacitance occurs easily in the deep trench insulator 20, and a buried oxide layer 30 between an active region and a substrate 10. When the device is operated under a voltage, especially high voltage, coupling effect occurs due to charging of the spurious capacitance described above. The spurious coupling effect not only influences adjacent devices, but also influences other electrical connected devices of the substrate.
Continuing advances in semiconductor manufacturing processes have resulted in semiconductor devices with precision features and/or higher degrees of integration. However, with higher device speeds, it has become more difficult to control spurious capacitance or spurious resistance, thus hindering frequency improvement of the devices. The hindering effect is also called resistive capacitive delay (RC delay). RC delay results in not only hindering further increase of device speeds, but also exacerbates unnecessary energy loss. The effects described above influence not only working status but also stability of devices. RC delay is a major issue for semiconductor devices with higher speeds and lower tolerance for noise of the devices.
As such, a semiconductor and a fabrication method thereof mitigating the above deficiencies are needed.